In recent years, mobile information processing apparatuses such as a mobile phone, PDA (personal digital assistant), digital camera, and the like have come into widespread use. Also, a mobile printer which can operate on a battery has prevailed.
Since these mobile information processing apparatuses continuously operate on a battery, a reduction in power consumption is a significant design factor.
Along with an increase in integration degree of semiconductors, more and more circuits are packaged in a semiconductor chip. The price of a semiconductor chip increases with an increase in the number of I/O pins of the chip. It costs a large sum to manufacture a semiconductor chip including a key input circuit and a display processing circuit both of which require a large number of I/O pins.
For this reason, there has conventionally been proposed the following apparatus. In the apparatus, a sub-CPU comprises a key input circuit and a display processing circuit both of which require a large number of I/O pins, and a main CPU operating on a high-speed clock performs processes which need to be performed at high speed. In a standby state, the main CPU is inactivated, and the sub-CPU processes key inputs and performs display processing.
A main CPU is an LSI which employs a microprocessor or DSP (digital signal processor) and executes main functions of an information processing apparatus, i.e., image processing, communication processing, and the like. Examples of the main CPU include one in which gate arrays constitute an image processing circuit. On the other hand, a sub-CPU is an LSI which operates on a low-speed clock and performs display processing and key input processing that need not be performed at high speed.
To control the state of a main CPU by a sub-CPU, there is proposed a facsimile apparatus using a sub-CPU which receives an instruction for shifting to an energy-efficient mode to interrupt power supply to a main CPU. This apparatus forcibly resumes power supply to the main CPU by detecting any abnormality in a watchdog timer or the like in the sub-CPU (e.g., see Japanese Patent Laid-Open No. 2000-232540).
Also, as an apparatus using a sub-CPU, there is proposed an information processing apparatus in which a sub-CPU performs control operation processing in accordance with input commands, and a main CPU performs data processing (e.g., see Japanese Patent Laid-Open No. 4-309110).
Additionally, there is proposed a facsimile in which a main CPU monitors the operation output signal with a predetermined period from the sub-CPU, detects any abnormality in a sub-CPU from the period of the operation output signal, and turns off the driving power source of the sub-CPU (e.g., see Japanese Patent Laid-Open No. 3-230666).
Assume that in an information device using a plurality of control unit such as a CPU, an abnormality occurs in a main CPU or power supply unit. Since the power supply amount of the power supply unit is larger than the power supply amount for a sub-CPU, the abnormality may lead to a serious accident such as ignition or smoking. Accordingly, any abnormality must be detected, and the user must be warned of the abnormality.
In Japanese Patent Laid-Open No. 2000-232540, if a malfunction is detected in the sub-CPU, the main CPU is forced to operate, and power supply is forcibly resumed. Japanese Patent Laid-Open No. 2000-232540 does not consider a case wherein an abnormality occurs in the main CPU or a power supply unit.
In Japanese Patent Laid-Open No. 4-309110, the sub-CPU does not control the power supply unit, and no abnormality is detected in the information processing apparatus. Thus, Japanese Patent Laid-Open No. 4-309110 does not solve the above-mentioned problems.
In Japanese Patent Laid-Open No. 3-230666, any abnormality in the sub-CPU is detected from its operation signal. The sub-CPU does not control a power supply unit, and no abnormality is detected in the entire information processing apparatus.
Therefore, the above-mentioned conventional techniques do not solve the above-mentioned problems.